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  dg303a s 4 d 2 nc cerdip and sidebraze s 3 in 1 d 4 v? d 1 s 1 gnd v+ in 2 d 3 s 2 1 2 3 4 5 6 7 14 13 12 11 10 9 8 top view dg303a_mil vishay siliconix document number: 71400 s-02967?rev. a, 22-jan-01 www.vishay.com 1 cmos analog switches (obsolete for non-hermetic. use dg303b as pin-for-pin replacements.)   
 

   analog signal range:  15 v  fast switching?t on : 150 ns  low on-resistance?r ds(on) : 30  single supply operation  latch-up proof  cmos compatible  full rail-to-rail analog signal range  low signal error  low power dissipation  low level switching circuits  programmable gain amplifiers  portable and battery powered systems  

 the dg303a_mil is a monolithic cmos switch in a dpst configuration for precision applications in communications, instrumentation and process control, where low leakage switching combined with low power consumption are required. designed on the vishay siliconix plus-40 cmos process, these switches are latch-up proof, and are designed to block up to 30 v peak-to-peak when off. an epitaxial layer prevents latchup. in the on condition the switches conduct equally well in both directions (with no offset voltage) and minimize error conditions with their low on-resistance. featuring low power consumption (3.5 mw typ) these switches are ideal for battery powered applications, without sacrificing switching speed. designed for break-before-make switching action, these devices are cmos and quasi ttl compatible. single supply operation is allowed by connecting the v? rail to 0 v.  
    
 
  

   logic sw 1 , sw 2 sw 3 , sw 4 0 off on 1 on off logic ?0?  0.8 v logic ?1?  4 v 


 temp range package part number dg303aak  14-pin cerdip dg303aak/883 ?55 to 125  c jm38510/11604bca 14-pin sidebraze jm38510/11604bcc
dg303a_mil vishay siliconix www.vishay.com 2 document number: 71400 s-02967 ? rev. a, 22-jan-01  

 voltages referenced to v ? v+ 44 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd 25 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . digital inputs a , v s , v d (v ? ) ? 2 v to (v+) +2v or . . . . . . . . . . . . . . . . . . . . . . . . 30 ma, whichever occurs first current, any terminal 30 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current, s or d (pulsed at 1 ms, 10% duty cycle max) 100 ma . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature (a suffix) ? 65 to 150  c . . . . . . . . . . . . . . . . . . . . power dissipationb 14-pin cerdip c 825 mw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . notes: a. signals on s x , d x , or in x exceeding v+ or v ? will be clamped by internal diodes. limit forward diode current to maximum current ratings. b. derate 6.5 mw/  c above 25  c c. derate 11 mw/  c above 75  c  


     figure 1. level shift/ drive v in s v+ gnd v ? d v ? v+
dg303a_mil vishay siliconix document number: 71400 s-02967 ? rev. a, 22-jan-01 www.vishay.com 3  


   test conditions unless specified limits ? 55 to 125  c parameter symbol v+ = 15 v, v ? = ? 15 v v in = 0.8 v or v in = 4 v f temp b min d typ c max d unit analog switch analog signal range e v analog full ? 15 15 v drain-source on-resistance r ds(on) v d =  10 v, i s = ? 10 ma room full 30 50 75 source off leakage current i s(off)   room hot ? 1 ? 100  0.1 1 100 drain off leakage current i d(off) v s =  14 v, v d =  14 v room hot ? 1 ? 100  0.1 1 100 na drain on leakage current i d(on) v d = v s =  14 v room hot ? 1 ? 100  0.1 1 100 digital control input current with v in = 5 v room full ? 1 ? 1 ? 0.001 input current with input voltage high i inh v in = 15 v room full 0.001 1 1 a input current with input voltage low i inl v in = 0 v room full ? 1 ? 1 ? 0.001 dynamic characteristics turn-on time t on room 150 300 turn-off time t off see figure 2 room 130 250 ns break-before-make time t open figure 3 room 50 charge injection q c l = 1 nf, r gen = 0 , v gen = 0 v, figure 4 room 8 pc source-off capacitance c s(off) room 14 drain-off capacitance c d(off) v s , v d = 0 v, f = 1 mhz room 14 channel-on capacitance c d(on) s d room 40 pf v in = 0 v room 6 input capacitance c in f = 1 mhz v in = 15 v room 7 off-isolation oirr v in = 0 v, r l = 1 k room 62 crosstalk (channel-to-channel) x talk v in = 0 v, r l = 1 k power supplies positive supply current i+ v in = 4 v (one input) room full 0.23 0.5 1 ma negative supply current i ? v in = 4 v (one input) all others = 0 v room full ? 10 ? 100 ? 0.001 positive supply current i+ room full 0.001 10 100 a negative supply current i ? v in = 0.8 v (all inputs) room full ? 10 ? 100 ? 0.001 notes: a. refer to process option flowchart. b. room = 25  c, full = as determined by the operating temperature suffix. c. typical values are for design aid only, not guaranteed nor subject to production testing. d. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data s heet. e. guaranteed by design, not subject to production test. f. v in = input voltage to perform proper function.
dg303a_mil vishay siliconix www.vishay.com 4 document number: 71400 s-02967 ? rev. a, 22-jan-01 
   

     r ds(on) vs. v d and power supply charge injection vs. analog voltage switching time and break-before-make time vs. positive supply voltage r ds(on) vs. v d and temperature r ds(on) vs. v d and power supply voltage r ds(on) ? drain-source on-resistance ( ) r ds(on) ? drain-source on-resistance ( ) r ds(on) ? drain-source on-resistance ( ) q (pc) (ns) t on ,t off v d ? drain voltage (v) v d ? drain voltage (v) v d ? drain voltage (v) v s ? source voltage (v) v+ ? positive supply (v) 90 ? 25 ? 15 ? 5 5 15 25 70 50 30 10  5 v t a = 25  c 60 ? 15 ? 10 ? 50 51015 50 40 30 20 10 v+ = 15 v v ? = ? 15 v 0 5 10 15 20 20 v ? = 0 v t a = 25  c 50 ? 15 ? 10 ? 5051015 40 30 20 10 0 v+ = 15 v v ? = ? 15 v c l = 1 nf 500 0 5 10 15 400 300 200 100 0 dg301/303 only t open t off t on v ? = ? 15 v t a = 25  c v inh = 4 v v inl = 0 v t a = 125  c t a = 25  c t a = ? 55  c  8 v  10 v  12 v  15 v  20 v 40 60 80 100 7.5 v 10 v 15 v 20 v input switching threshold vs. positive supply voltage v+ ? positive supply (v) (v) t v 0 5 4 3 2 1 51015 v ? = ? 15 v t a = 25  c
dg303a_mil vishay siliconix document number: 71400 s-02967 ? rev. a, 22-jan-01 www.vishay.com 5 
   

      10 supply current vs. temperature leakage vs. temperature switching time vs. power supply voltage off isolation and crosstalk vs. frequency supply curents vs. switching frequency temperature (  c) f ? frequency (hz) f ? frequency (hz) temperature (  c) supply voltage (v) i+, i ? ( a) (db) i+, i ? (ma) i s time (ns) ? 55 ? 35 ? 15 5 25 45 65 85 105 125 500 400 300 200 100 0 ? 100 i+ i ? ? 55 ? 35 ? 15 5 25 45 65 85 105 125 v+ = 15 v v ? = ? 15 v v s , v d =  14 v 10 pa i d(on) i d(off) or i s(off) 100 pa 1 na 10 na 100 na ? 120 ? 20 10 k 100 k 1 m 10 m v+ = +15 v v ? = ? 15 v r l = 50 crosstalk off isolation ? 100 ? 80 ? 60 ? 40 15 0 +i ? i v+ = 15 v v ? = ? 15 v 5 10 1 k 10 k 100 k 1 m 400 350 300 250 200 150 100 50 0 t off t on , i d  12  14  16  18  20  22 switching time vs. temperature temperature (  c) ? 55 400 350 300 250 200 150 100 50 ? 35 ? 15 5 25 45 65 85 105 125 0 t off t on v+ = 15 v v ? = ? 15 v v s = 3 v time (ns) v+ = 15 v v ? = ? 15 v v in = 4 v (one input) (all other = 0 v)
dg303a_mil vishay siliconix www.vishay.com 6 document number: 71400 s-02967 ? rev. a, 22-jan-01 
 
 figure 2. switching time v s = 3 v r l r l + r ds(on) v o = v s c l (includes fixture and stray capacitance) v ? v+ in s c l 33 pf d 5 v r l 300 v o ? 15 v gnd +15 v 50% 90% 0 v 0 v 10% logic input switch output v s t on t off logic ? 1 ? = switch on figure 3. break-before-make spdt 0 v 50% 50% 50% 0 v 0 v logic input switch output switch output logic ? 1 ? = switch on v inh v s1 v s2 v o1 v o2 t bbm v o1 s 2 s 1 d 2 r l2 300 c l2 33 pf v+ v o2 v s2 = 3 v in v s1 = 3 v r l1 300 c l1 33 pf c l (includes fixture and stray capacitance) v ? d 1 ? 15 v gnd +15 v figure 4. charge injection on off on in x v o v o c l 1 nf 3 v v ? ? 15 v v o gnd v+ r g s v g d in +15 v
dg303a_mil vishay siliconix document number: 71400 s-02967 ? rev. a, 22-jan-01 www.vishay.com 7 

 
  v+ positive supply voltage (v) v? negative supply voltage (v) gnd voltage (v) v in logic input voltage v inh(min) /v inl(max) (v) v s or v d analog voltage range (v) 15 20 15 ? 15 ? 20 0 0 0 0 4/0.8 4/0.8 4/0.8 ? 15 to 15 ? 20 to 20 0 to 15 note: a. application hints are for design aid only, not guaranteed and not subject to production testing.
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.


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